Beyond the IO Board: A Deep-Dive Engineering Guide to Custom CM4 Carrier Board Design

Posted on by Andy Timmins

The Raspberry Pi Compute Module 4 (CM4) is a formidable System on Module (SoM). It distills the power of the Pi 4 into a compact, robust form factor, but it’s useless on its own. It’s designed to be socketed into a custom carrier board that provides power, breaks out I/O, and tailors the system to a specific application.

While the official CM4 IO board is a great development tool, the real power is in building your own. This isn’t a simple “connect-the-dots” project. You are engineering a complex PCB to support a 1.5GHz quad-core SoM. This requires a strong understanding of power integrity, signal integrity (SI), impedance control, and high-speed PCB layout.

This guide is a technical overview of the critical design considerations. It assumes you are proficient with an ECAD (Electronic Design Automation) suite like KiCad, Altium, or Eagle and are not afraid to read a 100+ page datasheet.

 

☢️ Important Engineering & Safety Disclaimer

Warning: This is an advanced electronics design project. You are working with expensive, sensitive components that are extremely vulnerable to damage.

  • Risk of Component Destruction: The CM4 is highly sensitive to Electrostatic Discharge (ESD), over-voltage, and reverse polarity. A single wiring error (e.g., swapping 5V and GND), a short circuit, or a poorly designed power supply will permanently destroy your CM4.
  • Risk of Fire: A flawed power subsystem (e.g., undersized PCB traces for high-current paths, incorrect voltage regulator implementation) can overheat, melt components, and create a significant fire hazard.
  • No Warranty or Liability: This guide is for educational and informational purposes only. All design, fabrication, assembly, and testing are done ENTIRELY AT YOUR OWN RISK. The author accepts no liability for any damage to equipment (including your CM4, peripherals, or test equipment), loss of data, or injury to yourself or others.

If you are not confident in your ability to design, debug, and safely power high-speed digital electronics, do not attempt this project.

 

Phase 1: Schematic Design & Architecture

Your schematic is the blueprint. A mistake here is fatal to the board. Your primary documents are the CM4 Datasheet and the CM4 IO Board Schematics. Have them open at all times.

1.1 The Core: Connectors

The CM4 connects to your board via two Hirose DF40C-100DP-0.4V(51) 100-pin connectors.

  • Design Consideration: Your ECAD footprint must be perfect. The 0.4mm pitch is extremely fine. A 0.1mm error in the pad-to-pad spacing will make assembly impossible or create a board-wide short. Download a verified, 1:1 footprint from a trusted source (like SnapEDA or the official KiCad libraries).
  • Wiring: All 200 pins must be addressed. All GND pins must be connected to your ground plane. All VBAT (5V) pins must be connected to your 5V power plane.

1.2 The Power Subsystem (Power Integrity)

This is the most critical and most common point of failure. Get this wrong, and you’ll face random crashes, boot failures, and peripheral disconnects.

  • Main Supply (VBAT):
    • The CM4 requires one main supply: 5V. The datasheet specifies 5V +/- 5%.
    • CRITICAL: The module’s onboard PMIC (Power Management IC) generates all other internal voltages (3.3V, 1.8V, etc.). You MUST NOT supply external 3.3V or 1.8V to the module’s output pins (like 3.3V_OUT). These are outputs from the CM4, intended to power your external peripherals (up to ~500mA total).
    • Current: Your 5V rail must be stable and low-noise. It must be able* at least 3A. If you plan to use PCIe and high-power USB devices, a 5A or 6A-capable supply is a safer design.
  • Generating Your 5V Rail (Input Stage):
    • Option 1: USB-C (Simple 5V/3A): This is the “Pi 4” method. To signal to a 3A power brick that you can accept 3A, you must place a 5.1k-ohm pull-down resistor on each of the CC1 and CC2 pins.
    • Option 2: USB-C (Power Delivery): To negotiate for higher voltages (e.g., 9V, 12V, 20V) which you then buck-convert down to 5V, you must use a dedicated PD controller IC (e.g., FUSB302, STUSB4500). This IC communicates with the power brick over the CC lines (via I2C) to request a specific voltage profile.
    • Option 3: Barrel Jack (e.g., 12V-24V): This is the most robust. You MUST use a switching buck converter (SMPS). An LDO (Low-Dropout) regulator is not an option.

      Design Consideration: Why no LDO? P_dissipated = (V_in - V_out) * I_load With a 12V input and a 2A load: P_dissipated = (12V - 5V) * 2A = 14 Watts! This would require a massive heatsink. A 90%-efficient buck converter would only dissipate approx. 1.1W.

  • Decoupling: High-speed CPUs draw current in high-frequency spikes. The inductance of your PCB traces is too high to supply this current instantly. Decoupling capacitors act as tiny, local reservoirs of charge.
    • Wiring: The datasheet specifies a bank of capacitors for VBAT. You must place, at a minimum, 2x 22uF, 4x 1uF, and 4x 0.1uF ceramic capacitors (X5R/X7R) as physically close to the VBAT and GND pins on the DF40 connectors as possible. (See Phase 2 for placement).
  • Power Control Pins:
    • GLOBAL_EN (J2, Pin 98): This is the master “on/off” switch for the entire CM4. It must be pulled HIGH to enable the PMIC.
      • Wiring: For an “always on” board, connect this directly to 3.3V_OUT (J2, Pin 94). For a power button, use a 10k-100k pull-up resistor to 3.3V_OUT and a momentary button that shorts the pin to GND.
    • RPI_nBOOT (J1, Pin 25): This is critical for flashing eMMC modules.
      • Wiring: It must be accessible.
        • Normal Boot: The pin must be pulled HIGH (e.g., 10k pull-up to 3.3V_OUT).
        • rpiboot (Flashing mode): The pin must be pulled LOW (to GND) before power is applied (or GLOBAL_EN goes high).
      • Implementation: Wire a 10k pull-up to 3.3V_OUT and also wire a 2-pin header (or a button) from this pin to GND.
    • RUN_PG (J2, Pin 96): This is an output from the CM4. It goes HIGH when the PMIC is stable and the Pi is “running”.
      • Design Consideration: This is a “Power Good” signal. You can use this to control the nRST (active-low reset) pin of other ICs (like a USB hub or Ethernet PHY), ensuring they are held in reset until the Pi is fully ready.

1.3 High-Speed Interfaces (Signal Integrity)

This is where most first-time boards fail. You don’t just “connect” these wires; you “route” them as controlled-impedance transmission lines.

  • USB 2.0:
    • Pins: USB_DP, USB_DN. This is one USB 2.0 OTG port.
    • Impedance: 90-ohm differential pair.
    • Design Consideration: To get more ports, you must use an external USB Hub IC (e.g., Microchip USB2514B).
      • Hub Wiring: CM4 USB_DP/DN -> Hub Upstream Port. Hub Downstream Ports -> Your USB-A Connectors. The hub itself will need power (3.3V, 1.8V), a reset pin (connect to RUN_PG), and usually a 24MHz crystal.
    • ESD Protection: Mandatory. Place a TVS diode array (e.g., TPD4E001) directly at the USB connector pins, before any other component.
  • Ethernet (Gigabit):
    • Pins: ETH_TXP/ETH_TXN, ETH_RXP/ETH_RXN.
    • Impedance: 100-ohm differential pairs.
    • Wiring: You must route these to a MagJack (an RJ45 connector with integrated magnetics/transformers). You cannot use a plain RJ45 connector. The magnetics provide galvanic isolation and impedance matching.
    • Termination: The PHY-side center taps of the MagJack’s transformers must be terminated. Typically, this involves a 75-ohm resistor and a 1nF capacitor to GND, but always follow the MagJack’s datasheet.
  • PCIe (Gen 2.0 x1) – A Deeper Look:
    • Overview: The CM4 provides a single Gen 2.0 PCIe lane (a “x1” link). A single lane consists of two differential pairs: one for transmitting (TX) and one for receiving (RX). Gen 2.0 speed is 5.0 GT/s (Gigatransfers per second), which gives a theoretical max throughput of 500 MB/s before 8b/10b encoding overhead.
    • Impedance: All three pairs (TX, RX, CLK) are 100-ohm differential pairs. This is non-negotiable.
    • Critical Signals & Wiring:
      • PCIE_TXP/PCIE_TXN (Transmit): These are outputs from the CM4. This pair sends data to your PCIe device (e.g., an NVMe drive).
      • PCIE_RXP/PCIE_RXN (Receive): These are inputs to the CM4. This pair receives data from your PCIe device.
      • PCIE_CLKP/PCIE_CLKN (Reference Clock): This is a 100MHz differential clock output from the CM4. This is a huge advantage, as you do not need to supply your own 100MHz clock source. You route this pair from the CM4 to the CLK+/CLK- pins on your M.2 slot or PCIe device.
      • PCIE_PERST_N (PCIe Reset): This is an active-low reset signal, an output from the CM4. The CM4 holds this line LOW during boot-up to keep the PCIe device in a reset state, then releases it (pulls HIGH) to allow the device to initialize.
        • Wiring: Connect this directly from the CM4 PCIE_PERST_N pin to the PERST# pin on your M.2 slot.
        • Good Practice: Add a 10k-ohm pull-up resistor from this trace to 3.3V_OUT. This ensures the line is in a known-good (de-asserted) state. The CM4 IO board does this, and you should too.
    • Mandatory AC Coupling:
      • The PCIe specification requires the TX and RX pairs to be AC-coupled. This removes any DC common-mode voltage differences between the CM4 and the end-device.
      • Wiring: You must place 100nF (0.1uF) ceramic capacitors (0402 size is ideal) in-line on each of the four traces (TXP, TXN, RXP, RXN).
      • CRITICAL: You DO NOT AC-couple the PCIE_CLKP/PCIE_CLKN pair. This is a common and fatal mistake.
      • Placement: Convention is to place the caps near the transmitter side of each pair.
        • Place caps for PCIE_TXP/N near the CM4 connector.
        • Place caps for PCIE_RXP/N near the M.2 slot (as the M.2 card is the transmitter).
        • CM4:TXP -> C(100nF) -> M.2:PETp
        • CM4:RXN <- C(100nF) <- M.2:PERn
    • Clock Termination:
      • The 100MHz reference clock must be terminated at the receiver. This means the termination resistors are on the end-device (e.g., the NVMe drive).
      • Your Role: Do not add 100-ohm termination resistors for the clock on your carrier board. Simply route the traces directly to the M.2 slot.
  • MIPI (DSI / CSI):
    • Pins: DSI0_CLK_P/N, DSI0_D0_P/N, etc.
    • Impedance: 100-ohm differential pairs.
    • Design Consideration: These are for displays (DSI) and cameras (CSI). The critical rule is length matching. All pairs within a single group (e.g., DSI0 Clock + Data0 + Data1) must be routed to be the exact same length to prevent data skew.

1.4 Low-Speed Interfaces (The “Easy” Stuff)

  • I2C / SPI / UART: These are your workhorse peripherals.
    • Wiring: I2C lines (SDA/SCL) must have external pull-up resistors (e.g., 2.2k-ohm to 4.7k-ohm) to 3.3V_OUT.
  • Debug UART: Do not forget this. The most powerful debugging tool you have is the console.
    • Wiring: Route UART0_TXD (J1, Pin 32) and UART0_RXD (J1, Pin 33) to a 3-pin 0.1″ header (TX, RX, GND).

 

Phase 2: PCB Layout & Signal Integrity

A perfect schematic will fail with a bad layout. A 2-layer board is NOT AN OPTION. You must use a 4-layer (or 6-layer) board.

2.1 The 4-Layer Stack-up

This is the non-negotiable foundation. A standard, field-proven stack-up is:

  • L1 (Top): Signals (High-Speed: PCIe, USB, DSI)
  • L2 (Inner 1): GND (A solid, unbroken ground plane)
  • L3 (Inner 2): Power (A 5V plane, 3.3V plane, etc.)
  • L4 (Bottom): Signals (Low-Speed: I2C, SPI, GPIO)

Design Consideration: Why this stack-up?

  1. Return Path: Every signal has a return current. By placing a solid GND plane (L2) directly under your high-speed signals (L1), you provide a clean, low-inductance return path. This is the most important principle of high-speed design.
  2. Impedance Control: The trace width required for 90-ohm or 100-ohm is a function of its height above the reference plane (L2). On a 4-layer board, this height is small and well-controlled by the fab.
  3. Shielding: The inner GND and Power planes act as a shield, protecting your signals from external noise and preventing your board from radiating EMI.

2.2 Component Placement

  1. Place the CM4 connectors first. This is the center of your universe.
  2. Place all Decoupling Capacitors for the CM4. They must be on the Top layer, as physically close to the VBAT and GND pins as possible. The path from the cap pad -> via -> power plane must be short.
  3. Place your 5V Buck Converter and its components (inductor, caps) in one tight, isolated area. This is a “noisy” section; keep it away from sensitive analog or high-speed traces.
  4. Place all high-speed connectors (PCIe M.2, USB, Ethernet, DSI/CSI). Position them to allow for the shortest, straightest possible routes from the CM4.

2.3 Impedance Control & Routing Rules

  • Calculate Trace Widths: Use your ECAD software’s impedance calculator. Get the stack-up details from your fab (e.g., L1->L2 height = 0.2mm, dielectric constant (Er) = 4.2). Enter these values to find the exact trace width needed for 90-ohm (for USB) and 100-ohm (for PCIe/ETH/MIPI).
  • Route High-Speed First:
    • Differential Pairs: Route them as a pair. Keep the spacing between them consistent.
    • Length Matching (Intra-Pair): The + and - of a single pair (e.g., PCIE_TXP and PCIE_TXN) must be extremely tightly length-matched (aim for < 1mm or a few mils of skew).
    • Length Matching (Inter-Pair): For DSI/CSI, all pairs in a group must be matched. For PCIe, the TX, RX, and CLK pairs do not need to be matched to each other.
    • No 90-Degree Bends: Use 45-degree bends or, even better, curved traces. Sharp 90-degree corners create impedance discontinuities.
    • Vias are Evil: A via (a jump between layers) is a significant impedance discontinuity. Avoid vias on high-speed traces (especially PCIe) at all costs. Route them entirely on L1. If you must change layers, you enter the complex world of via impedance matching and return-path stitching vias, which is beyond this guide.

 

Phase 3: Fabrication, Assembly & Bring-Up

3.1 Fabrication & Assembly

  • Fabrication: Use a reputable fab that can handle fine-pitch (e.g., 0.4mm) and offers a 4-layer service (JLCPCB, PCBWay, OSH Park).
  • Assembly: The 0.4mm pitch DF40 connectors are NOT for hand-soldering.
    • Option 1: Stencil + Reflow. Order a solder paste stencil. Manually apply paste, place components, and reflow using a hot-air station or reflow oven. This is difficult but possible.
    • Option 2: PCBA Service. This is the most reliable option. Upload your Gerbers, BOM (Bill of Materials), and CPL (Component Placement List), and have the fab assemble the board for you. It’s worth the extra cost.

3.2 The “Smoke Test” (Board Bring-Up)

This is the most critical, nerve-wracking step.

  1. DO NOT INSERT YOUR CM4.
  2. Visual Inspection: Use a magnifying glass or microscope. Check the DF40 connector pins for tiny solder bridges.
  3. Multimeter Test (Power Off): Set your multimeter to continuity (“beep”) mode.
    • Probe VBAT and GND. It must not beep. If it does, you have a dead short. Find it.
    • Probe your 3.3V rail and GND. It must not beep.
  4. Power On (NO CM4):
    • Plug in your power source (e.g., USB-C or barrel jack).
    • Set your multimeter to DC Voltage mode.
    • Probe the VBAT and GND pins on the DF40 connector pads.
    • It must read 5V +/- 5%. If it’s 0V, 3V, or 12V, your power supply is broken. Fix it before proceeding.
    • Probe the 3.3V_OUT pins. They should be 0V (since the CM4 isn’t inserted to generate this voltage).
  5. The Moment of Truth:
    • Power off. Unplug all power. Wait 30 seconds for capacitors to discharge.
    • Insert your CM4. Be gentle. Press it in firmly and evenly until it clicks satisfyingly into place on both sides.
    • Connect your USB-to-UART serial adapter to your 3-pin debug header.
    • Take a deep breath. Power on the board.
    • LOOK and SMELL for any “magic smoke.” If you see or smell anything, power off immediately.
    • LOOK at your serial terminal. If you see the Raspberry Pi bootloader text scrolling by, congratulations. You have succeeded.
    • If nothing happens, check your GLOBAL_EN pin. Check your UART TX/RX wiring.

If it boots, test every single peripheral one by one. Check dmesg, lsusb, lspci, and ifconfig to see if your USB hub, PCIe device, and Ethernet are all detected. Good luck.